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SPI_verilogHDL
- 本原码是基于Verilog HDL语言编写的,实现了SPI接口设计,可以应用于FPGA,实现SPI协议的接口设计.在MAXII编译成功,用Modelsim SE 6仿真成功.-primitive code is based on Verilog HDL language, and achieving the SPI interface design, FPGA can be used to achieve agreement SPI interface design. MAXII success
SimpleSpi
- master spi的源代码(verilog),包括文档,测试程序-master spi the source code (verilog), including documentation, testing procedures
SPI-NOR-Flash-controller
- 难得的SPI NOR Flash控制器Verilog源代码-A rare SPI NOR Flash controller Verilog source code
SPI_interface.ZIP
- SPI接口代码,非常精简,verilog版本。-SPI interface code, very streamlined, verilog version.
Verilog-SPI
- verilog spi code-verilog spi code
spi_dac_ad7394_ad7395.v
- Verilog code of SPI configurator for DAC AD7394 and AD7395
spi_rtl
- 支持主从模式的、可综合的SPI verilog代码-Supports master and slave mode SPI communication module can be integrated RTL code
spi_ipcore
- 比较实用的SPI Verilog 编程,里面有仿真时序和源代码,简单改一改可直接,支持SPI双模式。-More practical SPI Verilog programming, which has simulation timing and source code, simple and can be directly altered, supports SPI dual mode.
3_05_SPI_Wr_Rd
- SPI读写实验,verilog源码,编译通过,有需要的拿去用-SPI source code
tiny_spi_latest.tar
- SPI master 的verilog源码,具有很好的学习价值。-Master SPI Verilog source code, has a good learning value.
spimaster.tar
- SPI Interface Master Control RTL Verilog Code
spi_boot-rel_3_1_rev_C.tar
- SPI Boot Interface Control RTL Verilog Code
rtl
- SPI verilog RTL code
spi_flash_controler
- w25q64 spi flash verilog code .use xilinx ise .
ad7606
- AD7606采集代码,用于verilog 驱动 AD7606 adc SPI 串口方式(AD7606 acquisition code, used for Verilog drive AD7606 ADC SPI serial mode)
AT25160B
- 该代码完成存储器的数据存储和读取功能,该芯片是一款Atmel的SPI接口的EEPROM存储芯片。(The code completes the memory data storage and reading function, the chip is a Atmel SPI interface EEPROM memory chip.)
spi_verilog_master_slave_latest.tar
- spi 的verilog rtl 代码, 包括整体仿真环境,测试码等(spi master or slave verilog rtl code)
spiflash
- SPI接口实现,对SPI写,擦出等功能操作,此代码在板子上进行验证过,没有任何问题(SPI interface implementation, write to SPI, wipe out and other functional operations, this code has been verified on the board, there is no problem.)
spi_master
- 用verilog编写的SPI代码,这个代码是FPGA作为主机可以发送和读取数据,上板验证过,我测试的时候SPI的CLK速率是5M,读写都没问题,稳,至于更高的速率没测试过。 下面鬼畜的百度翻译大家就不要看了,我不知道他想表达啥意思~(SPI code written in Verilog, the code is FPGA as the host can send and read data, the upper board verified, when I test the SPI CL
SPI_ADC
- spi串行输出ADC——AD7989的verilog源代码。(Spi serial output ADC - AD7989 Verilog source code.)